In summary: While President Trump’s tariffs on consumer goods have garnered attention, there may be a silver lining for the American semiconductor industry. Reports indicate that TSMC is fast-tracking its 3nm chip production in the US to mitigate potential trade disruptions.
According to MoneyDJ, TSMC’s second Arizona facility is set to start installing equipment for its advanced 3nm node by mid-2026, surpassing previous projections by over a year. This accelerated timeline could lead to mass production as early as 2027.
Currently, TSMC’s public roadmap suggests that the Arizona plant won’t begin producing 3nm and 2nm chips until 2028. Bringing this timeline forward by a whole year would be a remarkable achievement.
The driving force behind this expedited schedule appears to be potential tariffs on Taiwanese chips. TSMC seems to be proactively expanding its US production capacity to avoid future import levies. Additionally, the company is reportedly planning to offset tariff expenses by raising semiconductor prices by 15 percent.
Anticipated to commence volume production, TSMC’s Arizona Fab 2 is poised to output 25,000 to 30,000 3nm wafers per month. The company has a strong track record of meeting aggressive timelines, as evidenced by the early start of 4nm manufacturing at its first Arizona facility in Q4 2024.
The implications of this accelerated roadmap go beyond TSMC, impacting major chip designers like AMD, Nvidia, and Apple who rely on TSMC’s advanced process nodes for their upcoming products.
Notably, Nvidia and AMD are expected to leverage TSMC’s 3nm node for their next-gen “UDNA” and “Rubin” GPU architectures. With both companies recently unveiling their 2025 offerings, a two-year development cycle aligns well with TSMC’s revised production timeline.
Looking ahead, there is speculation about TSMC confirming plans for a third Arizona fab catering to future 2nm and sub-2nm nodes, although operationalization may not occur before 2030. Moreover, there are talks of TSMC establishing its first US-based advanced packaging plant, which would address a crucial gap in the domestic semiconductor supply chain.
